Using dataflow principle to exploit restricted and-parallelism in logic programs

Kang Zhang*

*Corresponding author for this work

Research output: Chapter in Book/Conference Proceeding/ReportConference Paper published in a bookpeer-review

Abstract

To improve the execution speed of logic programs, exploiting parallelism has proved to be promising. The paper presents a scheme supporting Restricted AND- parallelism improved over a previous scheme by exploiting more parallelism. The scheme is based on dataflow computation and implemented in a non-shared execution model, and thus taking advantages of distributed binding results. Comparison with the previous scheme is discussed and some examples given.

Original languageEnglish
Title of host publicationProceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering
PublisherPubl by IEEE
Pages150-153
Number of pages4
ISBN (Print)0780312333
Publication statusPublished - 1993
Externally publishedYes
EventProceedings of the 1993 IEEE Region 10 Conference on Computer, Communication, Control and Power Engineering (TENCON '93). Part 1 (of 5) - Beijing, China
Duration: 19 Oct 199321 Oct 1993

Publication series

NameProceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering

Conference

ConferenceProceedings of the 1993 IEEE Region 10 Conference on Computer, Communication, Control and Power Engineering (TENCON '93). Part 1 (of 5)
CityBeijing, China
Period19/10/9321/10/93

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