Wafer level bumping technology for high voltage LED packaging

Tiwei Wei; Xing Qiu; Jeffery C.C. Lo; S. W.Ricky Lee

doi:10.1109/IMPACT.2015.7365183

Wafer level bumping technology for high voltage LED packaging

Tiwei Wei, Xing Qiu, Jeffery C.C. Lo, S. W.Ricky Lee

Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review

10 Citations (Scopus)

Abstract

This paper proposed and developed an effective thermal management method for HVLED packaging with wafer level bumping technology. In the HVLED package, multiple thermal bumps were fabricated on HVLED chips to enhance heat dissipation. Cu-Sn-Cu bumps were used. The size, pitch and stand-off height of bumps were optimized for underfill dispensing. Moreover, a high thermal conductivity underfilll was used to further improve the thermal performance of the package.

Original language	English
Title of host publication	2015 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	54-57
Number of pages	4
ISBN (Electronic)	9781467383561
DOIs	https://doi.org/10.1109/IMPACT.2015.7365183
Publication status	Published - 23 Dec 2015
Event	10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015 - Taipei, Taiwan, Province of China Duration: 21 Oct 2015 → 23 Oct 2015

Publication series

Name	2015 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015 - Proceedings

Conference

Conference	10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015
Country/Territory	Taiwan, Province of China
City	Taipei
Period	21/10/15 → 23/10/15

Bibliographical note

Publisher Copyright:
© 2015 IEEE.

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10.1109/IMPACT.2015.7365183

Cite this

Wei, T., Qiu, X., Lo, J. C. C., & Lee, S. W. R. (2015). Wafer level bumping technology for high voltage LED packaging. In 2015 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015 - Proceedings (pp. 54-57). Article 7365183 (2015 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IMPACT.2015.7365183

Wei, Tiwei ; Qiu, Xing ; Lo, Jeffery C.C. et al. / Wafer level bumping technology for high voltage LED packaging. 2015 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2015. pp. 54-57 (2015 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015 - Proceedings).

@inproceedings{3adfd2249e894391ad9eff1263365415,

title = "Wafer level bumping technology for high voltage LED packaging",

abstract = "This paper proposed and developed an effective thermal management method for HVLED packaging with wafer level bumping technology. In the HVLED package, multiple thermal bumps were fabricated on HVLED chips to enhance heat dissipation. Cu-Sn-Cu bumps were used. The size, pitch and stand-off height of bumps were optimized for underfill dispensing. Moreover, a high thermal conductivity underfilll was used to further improve the thermal performance of the package.",

author = "Tiwei Wei and Xing Qiu and Lo, \{Jeffery C.C.\} and Lee, \{S. W.Ricky\}",

note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015 ; Conference date: 21-10-2015 Through 23-10-2015",

year = "2015",

month = dec,

day = "23",

doi = "10.1109/IMPACT.2015.7365183",

language = "English",

series = "2015 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015 - Proceedings",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "54--57",

booktitle = "2015 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015 - Proceedings",

}

Wei, T, Qiu, X, Lo, JCC & Lee, SWR 2015, Wafer level bumping technology for high voltage LED packaging. in 2015 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015 - Proceedings., 7365183, 2015 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015 - Proceedings, Institute of Electrical and Electronics Engineers Inc., pp. 54-57, 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015, Taipei, Taiwan, Province of China, 21/10/15. https://doi.org/10.1109/IMPACT.2015.7365183

Wafer level bumping technology for high voltage LED packaging. / Wei, Tiwei; Qiu, Xing; Lo, Jeffery C.C. et al.
2015 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2015. p. 54-57 7365183 (2015 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015 - Proceedings).

Research output: Chapter in Book/Conference Proceeding/Report › Conference Paper published in a book › peer-review

TY - GEN

T1 - Wafer level bumping technology for high voltage LED packaging

AU - Wei, Tiwei

AU - Qiu, Xing

AU - Lo, Jeffery C.C.

AU - Lee, S. W.Ricky

PY - 2015/12/23

Y1 - 2015/12/23

N2 - This paper proposed and developed an effective thermal management method for HVLED packaging with wafer level bumping technology. In the HVLED package, multiple thermal bumps were fabricated on HVLED chips to enhance heat dissipation. Cu-Sn-Cu bumps were used. The size, pitch and stand-off height of bumps were optimized for underfill dispensing. Moreover, a high thermal conductivity underfilll was used to further improve the thermal performance of the package.

AB - This paper proposed and developed an effective thermal management method for HVLED packaging with wafer level bumping technology. In the HVLED package, multiple thermal bumps were fabricated on HVLED chips to enhance heat dissipation. Cu-Sn-Cu bumps were used. The size, pitch and stand-off height of bumps were optimized for underfill dispensing. Moreover, a high thermal conductivity underfilll was used to further improve the thermal performance of the package.

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UR - https://www.scopus.com/pages/publications/84964194595

U2 - 10.1109/IMPACT.2015.7365183

DO - 10.1109/IMPACT.2015.7365183

M3 - Conference Paper published in a book

T3 - 2015 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015 - Proceedings

SP - 54

EP - 57

BT - 2015 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015 - Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015

Y2 - 21 October 2015 through 23 October 2015

ER -

Wei T, Qiu X, Lo JCC, Lee SWR. Wafer level bumping technology for high voltage LED packaging. In 2015 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2015. p. 54-57. 7365183. (2015 10th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2015 - Proceedings). doi: 10.1109/IMPACT.2015.7365183

Wafer level bumping technology for high voltage LED packaging

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