A zero-ESR stable compensation scheme for low dropout regulators

Abstract

High performance noise-sensitive RF circuits need a stable and low noise power source, and often, a low dropout regulator (LDR, also known as LDO) is used. However, in many existing designs, the stability of an LDR is restricted to a narrow range of equivalent series resistance (ESR) of the output filtering capacitor that translates to a significant increase in the development cost. Therefore, it is an important research and development topic in reducing or even eliminating the reliance on the ESR of the filtering capacitor.

In this research, a compensation technique is proposed to relax the ESR constraint on the stability of the low dropout regulator, such that the LDR is stable for an ESR that ranges from 0Ω up to a pre-designed value. We called such a scheme a zero-ESR stable compensation scheme. A buffer stage with a low gain is employed to achieve a compensation zero that is dependent on the load current, and as such, the low dropout regulator is stable for a load change of 0μA to the maximum load current, with an ESR of 0Ω up to a pre-designed value. The proposed LDR is designed and fabricated in a CSM 0.35μm CMOS technology using a thick gate high voltage 0.5μm transistor. Measurement results demonstrated that the LDR is stable for a load current that ranges from 0μA to 100mA, and the filtering capacitor has an ESR that ranges from 0Ω to 30Ω.

Date of Award	2005
Original language	English
Awarding Institution	The Hong Kong University of Science and Technology