As is well-known, with superior material properties, gallium nitride (GaN) high-electron-mobility-transistors (HEMTs) are emerging as promising candidates for next-generation power converters. GaN device would exhibit the capability of switching at a high speed, the vulnerable gate (narrow gate swing), and the relatively low threshold voltage. Therefore, the conventional repetitive circuit-implementation-based design and optimization would not only cause high cost and considerable time consumption, but could not directly monitor inside device package. For the purpose of accurately evaluating the switching performance of GaN transistor (such as over-voltage, switching loss, false turn-on, etc.), a physical-mechanism-based behavior device model would be highly desirable. Circuit design guidelines would be then provided, based on the accurately predicted transient waveforms, leading to an extended usage of GaN transistor. In consideration of the representativeness and research value, the commercially available GaN transistor with a ρ-GaN gate would be studied. Under a varying drain-voltage in switching process, the variation of ρ-GaN layer’s net-charge would cause a shift in threshold voltage (V
th). Such a feature would have notable impact on the static and dynamic performance of GaN transistor, whereas the V
th-shift is commonly neglected or merely qualitatively analyzed in the existing researches. In combination of the multi-scale static I-V modeling and the dynamic V
th-shift, the model for dynamic current-voltage (I-V) characteristics during a switching period would be proposed. The V
th-shift under soft- and hard-switching condition could be evaluated, based on an analysis associated with ρ-GaN layer’s net-charge. The time-dependence of the V
th-shift is studied, along with the mitigating effect of a positive V
th-shift on the false turn-on phenomenon. The proposed model could not only achieve an improved accuracy in simulating the transient waveforms, but would exhibit convenience and universality. The capacitance-voltage (C-V) characteristics could significantly affect both the intensity and the ringing frequency of transient signals. However, the existing behavior models would exhibit less comprehensiveness or modest accuracy. A physical-mechanism-based modeling approach is proposed, which fully considers the distinctive gate-regional junction capacitance, the field plates and the formation of channel. The strong nonlinearity caused by field plates in the static terminal C-V
ds curves would be precisely described with a multi-scale approach. On account of the difficulty in performing measurement inside device structure, the internal gate-regional junction capacitance could be derived from static terminal measurement. The impacts of channel’s formation on the static external terminal capacitance and on the internal gate-related junction capacitance would be represented with a multi-scale approach. The influence of channel’s formation during a switching process would be approximated, as well. At last, in combination of the static/dynamic C-V characteristics with dynamic transfer curves (including V
th-shift), a physical-mechanism-based behavior device model would be proposed for GaN transistor. In contrast to conventional behavior model, an accuracy enhancement could be achieved in the transient waveforms simulation (e.g. transient drain voltage, high-frequency displacement current, false triggering signal, etc.). Furthermore, the proposed model would be organized and universal. The existing research would show less accuracy in device/circuit comprehensive model, and would exhibit less adequacy in circuit-element-sensitivity of the fast-switching GaN device. Therefore, a “black-box” modeling approach is established for gate driver chip. Despite the obstacle encountered when observing inside chip package, the device behaviors relevant to the integrated circuit could be extracted from the precisely fitted outside terminal signals. An enhanced accuracy could be then achieved in simulating both transient signals and dead-time. Aside from ensuring a rapid switching speed, the small gate-regional capacitance of GaN device could simultaneously cause intensive gate noises. Based on the resonance mechanism between the power-stage high-frequency displacement current and drive-scheme network, a circuit-analysis method is proposed. The complicated impacts of various circuit parameters on false triggering signal (at gate terminal) could be then investigated. Through the optimization for gate-loop and power-stage, along with an appropriate externally-added gate-to-source capacitance, the false turn-on could be effectively mitigated. For the purpose of loss reduction, based on the trade-off between the extra switching loss caused by false turn-on and reverse conduction loss, the negative gate supply could be further optimized. The experimental platform along with the circuit-level implementation of the proposed device/circuit model would be presented at last. A dual-switch double pulse tester is designed for active switch measurement, while a synchronous buck converter prototype would be established for false turn-on evaluation. The circuit-implementation process of the proposed hybrid physical-behavior device model and gate driver model would be then presented. Taking advantage of the finite-element simulation, the relevant circuit parameters could be extracted and calibrated. Finally, a boost converter with the temperature-controlling capability would be established, where the high-temperature simulation could be verified.
| Date of Award | 2018 |
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| Original language | English |
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| Awarding Institution | - The Hong Kong University of Science and Technology
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