Abstract
Recent years have seen a significant surge in the capabilities and hardware requirements of artificial intelligence applications. Despite the emergence of various accelerators to continuously scale up, the disappointing reality remains that modern computing systems, which utilize electronic processors, are constrained by the physics of electrons, limiting both computational throughput and chip scalability. On the other hand, photonics, already applied in high-performance communication within industrial scenarios, is promising in accelerating AI computation due to its superior physical properties and compatibility with traditional electronic fabrication.This dissertation focuses on the practical design roadmap of photonic-electronic neurocomputing systems. First, it addresses modeling and reliability analysis of photonic integrated circuits. An innovative framework for loss and crosstalk estimation provides initial guidance on designing a photonic core to maximize performance while maintaining signal integrity. Additionally, a comprehensive full-stack toolchain for photonic-electronic accelerators enables the transition from initial design to real-world prototyping, ensuring physical execution and verification. Accompanying functional ISA and RTL-level simulators offer design space exploration during system design and pre-silicon stage testing. To streamline the chip development process, we introduce a LLM-aided photonic-electronic Design Automation (PEDA) framework. It allows human experts to iteratively develop chips, with the framework automatically converting human design outputs and feedback into datasets that fine-tune LLMs, forming a co-evolutionary cycle between human experts and LLMs. We anticipate that our innovative toolchain could pave the way for intelligent and efficient photonic-electronic neurocomputing system design.
| Date of Award | 2024 |
|---|---|
| Original language | English |
| Awarding Institution |
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| Supervisor | Jiang XU (Supervisor) & Wei ZHANG (Supervisor) |
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