Power-efficient code design for communications and on-chip buses

Abstract

The burgeoning proliferation of wireless network devices and their substantial energy consumption has driven a remarkable surge in interest surrounding power efficiency in recent decades. Additionally, the widespread deployment of wireless sensor networks (WSNs) for Internet of Things applications has intensified the demand for the development of power-efficient designs to extend battery life. In this regard, the exploration of power-efficient coding schemes holds great potential. Generally, the focus of power-efficient coding schemes revolves around two major aspects. One key focus is the development of power-efficient error-resilient coding schemes, which has the potential to reduce the required transmission power while ensuring reliable communication. Additionally, designing low-power bus codes presents an effective approach to reducing power consumption by minimizing power dissipation during data transmission within integrated circuits. In the first aspect, we focus on investigating a low-complexity joint source-channel coding scheme known as index assignment (IA). IA is a technique that entails assigning channel symbols to label quantized codewords, with the objective of minimizing the distortion between the transmitted and reconstructed quantized codewords in the presence of transmission errors. The IA technique effectively reduces the required transmission power to achieve the desired level of distortion. Conventional binary IA designs assume memoryless binary symmetric channels and aim to mitigate the distortion introduced by bit errors. However, practical scenarios often involve nonbinary channels with M-ary modulation schemes. In this thesis, we consider M-ary IA schemes that directly optimize the IA mapping for the M-ary channel. We begin by examining the specific case of an M-level equiprobable scalar quantizer and M-PSK modulation. The zigzag mapping is known to achieve optimality for asymptotically high signal-to-noise ratios (SNRs) when employing a maximum-likelihood (ML) decoder. However, determining the optimal IA for any SNR remains an open question. To address this, we establish a connection between the IA problem and discrete-convolution rearrangement inequalities. We derive an inequality specific to our problem, which establishes the optimality of the zigzag mapping under ML decoding for all SNRs. Furthermore, we demonstrate that the same inequality can prove the optimality of the zigzag mapping under minimum mean-squared error (MMSE) decoding. We further generalize the work by investigating the IA problem for M^L-point equiprobable vector quantizers and M-ary modulations. We introduce a tight lower bound on the distortion caused by channel errors. We then propose a two-step design approach that simplifies the problem and leads to near-optimal IA schemes. Moreover, we develop explicit IA constructions for practical modulation schemes, including PAM, QAM, and PSK. We rigorously prove the optimality of the IA design for 3-PSK and QPSK. For higher modulation orders, our proposed IAs closely approach the performance bounds, with only small gaps remaining. Simulation results of a WSN model reveal that the constructed IA design achieves significant energy saving when compared to the conventional binary counterpart. In our second aspect, we focus on designing low-power bus coding schemes to minimize energy consumption in data transmission caused by capacitance parasitized on the bus wires. Bus-invert coding (BI) is a popular technique for reducing energy consumption in off-chip data transmission. For on-chip interconnects, a specialized variant called coupling-driven bus-invert coding (CBI) has been proposed to enhance energy efficiency. CBI selects the output codeword by comparing the energy consumption of the data word and its fully inverted form, considering the coupling energy resulting from inter-wire coupling capacitance. To indicate the selected codeword, one redundant bit is appended. However, the question naturally arises regarding the optimality of fully inverting all data word bits. To address this, we propose a novel coding scheme called selective inversion coding, which introduces a selection vector to indicate the data word bits involved in the inversion operation. We formulate an optimization problem to minimize coupling energy for uniform data and explore optimal solutions for short codes. This examination reveals a simple underlying structure that motivates us to study the analytical solution. To simplify the problem, we employ an asymptotically accurate approximation to relax the problem, allowing us to derive the optimal selection vector for the relaxed scenario. We also provide the encoder circuit for our proposed scheme incorporating the derived selection vector. Numerical results demonstrate the superior performance of our scheme compared to the state-of-the-art CBI design in reducing overall energy consumption across various on-chip application scenarios. We further extend the inversion-based codes by incorporating multiple redundant bits, allowing for a larger set of candidate codewords to be compared and selected. We formulate the problem of finding the optimal selection vector codebook and develop a construction method for a near-optimal selection vector codebook specifically for the 2-bit redundant code, based on numerical search results. Additionally, we present the circuit design for the encoder of the 2-bit redundant code. Furthermore, we enhance the energy-saving potential by introducing a delay budget to the encoder and utilizing the Viterbi algorithm to reduce complexity. To address the performance degradation observed in the Viterbi-based encoder with short delays, we propose a low-complexity algorithm that mitigates the discontinuity issue responsible for the degradation. We also provide the circuit diagram for the implementation of the low-complexity Viterbi-based encoder.

Date of Award	2023
Original language	English
Awarding Institution	The Hong Kong University of Science and Technology
Supervisor	Wai Ho MOW (Supervisor)