Visible light communication system-on-chip design

Abstract

Visible light communication (VLC) has attracted a great deal of research interest for light fidelity (LiFi) applications to ease the ever-increasing radio spectrum congestion problem faced by the mobile communication industry. Furthermore, emerging Internet of Things (IoT) applications utilizing LED lights, signage, and displays as distributed digital content broadcasters have driven the integration level of VLC systems to lower manufacturing cost and higher energy efficiency. In this thesis, two System-on-Chip (SoC) have been proposed and implemented, including a transmitter SoC and a receiver SoC.

(1)The proposed transmitter SoC is the first active matrix light-emitting diode (AMLED) micro-display driver with an embedded VLC transmitter. The driver integrates four identical macro-cells, each containing a pixel driver array, a row driver, a column driver and a first-in first-out (FIFO) memory, to drive a wide quarter-VGA (WQVGA) display featuring 400×240 blue micro-LED (µLED) pixels fabricated on a single gallium nitride (GaN) substrate. The size of each µLED pixel is 30×30 µm². At the system level, pulse-width modulation (PWM) superimposed with on-off keying (OOK) modulation is proposed to accomplish grayscale control for display and simultaneously transmit VLC signals by modulating the µLED array. At the circuit level, a pixel driver cell consisting of three transistors and one capacitor (3T1C) with a novel VLC function is employed to implement the control scheme. Flip-chip bonding is adopted to establish connections between the WQVGA micro-display and the AMLED driver SoC. Implemented in a 0.5-µm CMOS process, the transmitter SoC enables a high-resolution micro-display module to achieve 4-bit grayscale at a 100-Hz frame rate, while supporting 1.25-Mb/s VLC for a bit error rate (BER) <10^-5 up to 25 cm distance without a lens. When using optical lenses, the VLC distance is extended to >500 cm.

(2) The proposed receiver SoC is an energy-efficient VLC receiver that employs ambient light rejection and post-equalization techniques for emerging LiFi applications based on ordinary phosphorescent white LEDs. The SoC integrates a variable-gain trans-impedance amplifier (TIA), an ambient light rejection (ALR) unit, a two-stage continuous time linear equalizer (CTLE) and a DC offset cancellation (DOC) amplifier. On-chip LDOs are utilized to suppress supply noise effects on the sensitive input stages. Implemented in a standard commercial 0.18-µm CMOS process, the SoC can deliver a bit efficiency of 92 pJ/bit at a peak data rate of Mb/s, which is over 6 times better than prior art. A complete IEEE 802.15.7 PHY-II standard-complaint LiFi link is demonstrated using the proposed receiver SoC and a custom transmitter SoC over 1.6 m distance with a BER of 1×10^-9.

Date of Award	2017
Original language	English
Awarding Institution	The Hong Kong University of Science and Technology